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Data Sheet
ARINC 629 PCIe Multi-Terminal Emulator with Error Insert/Detect Module
Sales Ref: Sy629PCIe-BPTe |
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Features
- Single Lane PCIe
- Embedded PCI Local Bus
- PCI interrupts on Module Events
- Short PCIe card
- Uses Boeing approved DATAC device
- Direct access to XPP and RPP from PCIe
- 120 Arinc-629 Terminals. Single bus connection
- Block & Independent Modes
- Primary and Alternate Schedules
- 256KB Dual Data Buffers
- On-Board Digital Signal Processor
- High Resolution System Timer
- Auto Cyclic Redundancy Checking (CRC)
- Auto Refresh Counter Support
- Correctly Emulates up to 120 Transmitters
- Bus Monitoring
- Transmit Monitoring
- Error Status Reporting
- IRIG-B Input
- Rx Time-Stamping
- External Timer Clock input
- FIFO buffers for Rx data and Time-Stamp
- Time-Stamp resolution 0.5µS
- Error Insertion and Detection
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The Sy629PCIe-BPTE card provides a convenient means for transmitting and receiving data over an ARINC 629 bus in accordance with the transmit and receive programme defined by data written into the XPP and RPP memory. In particular, this product can emulate up to 120 terminals transmitting on an ARINC-629 data bus whilst correctly maintaining the approved Basic Protocol. This product also offers enhanced facilities to enable a user to insert transmission errors onto the bus and detect and report errors in received messages.
The use of the recognised DATAC chip ensures full compliance to ARINC 629 specification with Basic Protocol (BP).
ARINC-629 Input/Output is via a 9-pin D-Type socket on the PCIe card faceplate. An IRIG-B input by coaxial connector is also on the PCIe card faceplate.
PCIe is essentially transparent to the user and the card appears as a PCI interface to the host. This ensures compatibility with Sycos PMC and PCI solutions.
The module provides configuration registers which allow the host to:
- Automatically identify the module and its revision status.
- Assign address space for the module’s data buffer memory and registers. (Plug-in and Play).
- Control and monitor the PCI bus interface to the module.
- Read module interrupt configuration as assigned by the POST software as it initialises and configures the system.
Additional features designed into the module are:
- High resolution time-stamping of received data (0.5µs resolution)
- PCI interrupts on Module Events.
- Direct access to Module registers and application memory.
- Interface compatible with 32bit PCI Local bus Specification, revision 2.1, June 1995.
The PCIe module is designed to be used in a "Plug-in and Play" environment which is made possible, not only by the choice of PCIe interface, but also by the provision of various identification and module present registers. These include:
- Device ID
- Vendor ID
- Subsystem ID
- Subsystem Vendor ID
- Module ID
Using these registers the host can detect the presence of the module, determine if this is consistent with system requirements and respond accordingly by configuring the system or reporting system deficiencies.
The Error Insert and Detection facility provides enhanced error detection together with the ability to insert user defined errors onto the ARINC-629 data bus. These errors can be inserted at either the string level or the word level, on any active terminal.
String errors are realised by substituting the wordstring for a given XPP location by the wordstring defined by an alternative XPP location. This can be used to alter some of the parameters of the XPP cell and thereby create an error.
Word errors are divided into five types, namely:
- GAP
- MID SYNC transition
- Biphase
- Parity
- High/Low bit count
The enhanced error detection facility checks for correct:
- GAP
- SYNC waveform
- Biphase on data and parity
- Parity