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ARINC 429 VME 16 Tx, 16 Rx Product

Occupying a single slot in a VME chassis, the Sy429VME-RT32 card offers an easy to use, high performance, VME interface to 32 ARINC-429/575 channels. The product is modular in architecture, where each module provides 4Tx, 4Rx configuration. Modules are user installable. ARINC-429 or ARINC-575 is software selectable on a per-channel basis. Received data is time-stamped with resolution selectable between 1µS and 255µS.

Received data is time-stamped and stored in a 256 x 32-bit FIFO data buffer for easy access by the host processor. Should an error occur during reception, the error condition is indicated by setting the parity bit (bit 32) of the received data word. (Options for deeper receive or transmit FIFOs are available). The cause of a receive error, whether due to parity, bit-count or word gap, can be identified from data in the Rx Error Status FIFO. Each receive channel is configured by writing data to a control register. Data can be received with speeds between 3.9 and 500 k bits/second.

Each transmit channel is individually software configured by writing data to a control register. This provides a choice of 125 separate data rates between 3.9 and 167 k bits/second and control over parity generation, inter-word gap and word-length (ie Fault Insertion). Data for transmission is written to the appropriate Transmit FIFO and, while there is data in the FIFO, transmission is automatic and continuous with the pre-selected minimum gap between ARINC words. A separate FIFO, with a capacity for 128 ARINC-429 words, is provided for each Tx channel. The output from the transmit FIFOs can be Enabled or Disabled by writing to a register. Options for deeper transmit FIFO are available. The ARINC-429 specification defines separate signal rise and fall times for High Speed and Low Speed operation. The necessary selection of appropriate signal rise and fall time is provided for each channel under software control. Each ARINC-429 driver is capable of driving beyond the maximum distance specified by ARINC.

A 32 bit Timer with a resolution selectable between 1 and 255 µs is provided for Time-Stamping received data. The Time-Stamp for each word received is stored in a separate Time-Stamp FIFO. The data from this FIFO is latched each time the Rx FIFO is read. The user can then read this latched Time-Stamp and be confident that it corresponds to the last ARINC-429 word read from the Rx Data FIFO. The user can select between an internal or external clock source. The timer can also be reset internally or externally and read by the Host Processor.

The card provides for monitoring a wide range of system events. When a monitored event occurs, a unique status word is generated and stored in a Status FIFO that can be read by the host system. Interrupts can be generated whenever there is data in the Event Status FIFO. The cause of the event is identified by reading the Event Status FIFO.

Separate events can be monitored for each channel which include:

- Tx FIFO status: Empty, ⅞ Full

- Rx FIFO status: Empty, ½ Full

- Receive error: Parity, Word Length, Word Gap & Rx FIFO overflow

The card can be programmed so that interrupts can be generated whenever there is data in the Event-Status FIFO. The cause of the interrupt is identified by reading the Event-Status FIFO.

A separate receiver is provided to monitor externally any transmit or receive channel. The user can select the channel to be monitored via a register and the received data can be read from a FIFO. This facility is independently controllable and does not interrupt or affect the channel being monitored. The condition of any driver or receiver device can be determined by appropriate use of this channel monitor utility.